{signal: [
['CLK',
  {name: 'BCLK40', wave: 'p.................',  "period": 3},
 {name: 'PCI33', wave: 'p.............',  "period": 3.5, "phase" : 1}],
 
['MC68040', 
  {name: 'A[31..0]', wave: 'x..=.............................x..', "period": 1.5}, 
  {name: 'D[0..31]', wave: 'x..=...........=.....=.....=.....x..', "period": 1.5, data: ['DATA0', 'DATA1', 'DATA2', 'DATA3']},
  {name: '_TA', wave: 'z..1.........0.1...0.1...0.1...0.1.z', "period": 1.5},
  {name: '_TS', wave: '1..0.1..............................', "period": 1.5},
  {name: '_UPAx', wave: '1..=.............................1..', "period": 1.5},
  {name: 'R_W', wave: '1..0.............................1..', "period": 1.5},
  {name: 'TT0', wave: '1...................................', "period": 1.5},
  {name: 'TT1', wave: '1..0.............................1..', "period": 1.5}],
 ['PCI BRIDGE/TARGET', 
  {name: '_FRAME', wave:'1........0...................................1........'},
  {name: 'AD[31..0]', wave: 'x.................=.......x.......=..........=..................=.................=................x........', "period": 0.5, data: ['ADDRESS', 'DATA0', 'DATA1', 'DATA2', 'DATA3']},
  {name: 'C/_BE[3..0]', wave:'x........=...x...=...............................x....', data: ['CMD', 'Byte Enable (_BE)']},  
  {name: '_IRDY', wave:'z....1...........0...1...0.......1...0...1...0...1...z'},
  {name: '_TRDY', wave:'z....1.......0.......1.......0...................1...z'},
  {name: '_DEVSEL', wave: 'z....1.......0...................................1...z'},  
 ]
  
], 
 config:{skin:'narrow'},
 head:{text:'CPU DRIVEN BURST WRITE CYCLE WITH WAIT TARGET STATE' } }