/* Generated automatically by the program `genconstants'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CONSTANTS_H
#define GCC_INSN_CONSTANTS_H

#define UNSPEC_LOG 16
#define UNSPEC_EXP2 15
#define UNSPEC_EXPM1 13
#define UNSPECV_TAS_1 3
#define UNSPECV_TAS_2 4
#define A0_REG 8
#define UNSPEC_TIE 5
#define UNSPEC_RELOC16 6
#define FP7_REG 23
#define UNSPEC_GOT 3
#define UNSPEC_EXP10 14
#define UNSPEC_RELOC32 7
#define D2_REG 2
#define A1_REG 9
#define UNSPEC_LOG1P 17
#define SP_REG 15
#define UNSPECV_BLOCKAGE 0
#define UNSPEC_LOG2 19
#define UNSPEC_ASIN 9
#define FP0_REG 16
#define A6_REG 14
#define D0_REG 0
#define D7_REG 7
#define UNSPEC_SIN 1
#define UNSPEC_ACOS 10
#define UNSPEC_COS 2
#define FP1_REG 17
#define UNSPEC_TAN 8
#define UNSPEC_IB 4
#define UNSPEC_LOG10 18
#define D1_REG 1
#define UNSPEC_ATAN 11
#define UNSPECV_CAS_1 1
#define UNSPECV_CAS_2 2
#define UNSPEC_EXP 12

#endif /* GCC_INSN_CONSTANTS_H */